rfdc¶
RF Data Converter control — DAC/ADC tile management, mixer and NCO configuration, and amplitude conversion helpers.
rfsoc_rfdc.rfdc
¶
Attributes¶
Classes¶
MyRFdcStatus(rfdc)
¶
Status of RF Data Converter
Source code in rfsoc_rfdc/rfdc.py
Attributes¶
dac_tile_status = rfdc.IPStatus['DACTileStatus']
instance-attribute
¶
adc_tile_status = rfdc.IPStatus['ADCTileStatus']
instance-attribute
¶
dac_tile_mask_out = [False, False, False, False]
instance-attribute
¶
adc_tile_mask_out = [False, False, False, False]
instance-attribute
¶
dac_clk_dist_status = rfdc.ClkDistribution['DAC']
instance-attribute
¶
adc_clk_dist_status = rfdc.ClkDistribution['ADC']
instance-attribute
¶
Functions¶
get_dac_tile_enb(tile_id)
¶
get_dac_tile_state(tile_id)
¶
get_dac_powerup_state(tile_id)
¶
get_dac_pll_state(tile_id)
¶
get_dac_block_enb(tile_id, block_id)
¶
get_dac_clk_dist(tile_id)
¶
get_adc_tile_enb(tile_id)
¶
get_adc_tile_state(tile_id)
¶
get_adc_powerup_state(tile_id)
¶
get_adc_pll_state(tile_id)
¶
get_adc_block_enb(tile_id, block_id)
¶
MyRFdcDACTile(tile_id, rfdc_dac_tile=None)
¶
Bases: RFdcDacTile
New DAC tile class that inherits everything from Xilinx's RFdcDacTile class
Source code in rfsoc_rfdc/rfdc.py
MyRFdcADCTile(tile_id, rfdc_adc_tile=None)
¶
Bases: RFdcAdcTile
New ADC tile class that inherits everything from Xilinx's RFdcAdcTile class
Source code in rfsoc_rfdc/rfdc.py
MyRFdcFreqConfig(ref_clk, dac_samp_rate, dac_nco, dac_interp_rate, adc_samp_rate, adc_nco, adc_interp_rate, clock_src=xrfdc.CLK_SRC_PLL)
¶
RFDC clock and sampling rate configuration
Source code in rfsoc_rfdc/rfdc.py
Attributes¶
ref_clk = ref_clk
instance-attribute
¶
clock_src = clock_src
instance-attribute
¶
dac_samp_rate = dac_samp_rate
instance-attribute
¶
dac_nco = dac_nco
instance-attribute
¶
dac_interp_rate = dac_interp_rate
instance-attribute
¶
adc_samp_rate = adc_samp_rate
instance-attribute
¶
adc_nco = adc_nco
instance-attribute
¶
adc_interp_rate = adc_interp_rate
instance-attribute
¶
Functions¶
mandatory_check()
¶
Source code in rfsoc_rfdc/rfdc.py
comm_sys_check()
¶
filter_check()
¶
Source code in rfsoc_rfdc/rfdc.py
MyRFdcConfig()
¶
Source code in rfsoc_rfdc/rfdc.py
Attributes¶
freq_cfg = MyRFdcFreqConfig(ref_clk=(ZCU216_CONFIG['RefClockForPLL']), dac_samp_rate=(ZCU216_CONFIG['DACSampleRate']), dac_nco=(ZCU216_CONFIG['DACNCO']), dac_interp_rate=(ZCU216_CONFIG['DACInterpolationRate']), adc_samp_rate=(ZCU216_CONFIG['ADCSampleRate']), adc_nco=(ZCU216_CONFIG['ADCNCO']), adc_interp_rate=(ZCU216_CONFIG['ADCInterpolationRate']), clock_src=(xrfdc.CLK_SRC_PLL))
instance-attribute
¶
dac_block_cfg = {'InterpolationFactor': self.freq_cfg.dac_interp_rate, 'NyquistZone': ZCU216_CONFIG['DACNyquistZone'], 'UpdateEvent': xrfdc.EVENT_MIXER, 'InvSincFIR': ZCU216_CONFIG['InvSincFIR']}
instance-attribute
¶
dac_block_mixer_cfg = {'CoarseMixFreq': xrfdc.COARSE_MIX_BYPASS, 'EventSource': xrfdc.EVNT_SRC_TILE, 'FineMixerScale': xrfdc.MIXER_SCALE_1P0, 'Freq': self.freq_cfg.dac_nco, 'MixerMode': xrfdc.MIXER_MODE_C2R, 'MixerType': xrfdc.MIXER_TYPE_FINE, 'PhaseOffset': 0}
instance-attribute
¶
adc_block_cfg = {'DecimationFactor': self.freq_cfg.adc_interp_rate, 'NyquistZone': ZCU216_CONFIG['ADCNyquistZone'], 'UpdateEvent': xrfdc.EVENT_MIXER}
instance-attribute
¶
adc_block_mixer_cfg = {'CoarseMixFreq': xrfdc.COARSE_MIX_BYPASS, 'EventSource': xrfdc.EVNT_SRC_TILE, 'FineMixerScale': xrfdc.MIXER_SCALE_1P0, 'Freq': self.freq_cfg.adc_nco, 'MixerMode': xrfdc.MIXER_MODE_R2C, 'MixerType': xrfdc.MIXER_TYPE_FINE, 'PhaseOffset': 0}
instance-attribute
¶
Functions¶
MyRFdc(rfdc_ip, debug_mode=False)
¶
My class for controlling the RF Data Converter.
Source code in rfsoc_rfdc/rfdc.py
Attributes¶
rfdc = rfdc_ip
instance-attribute
¶
rfdc_status = MyRFdcStatus(self.rfdc)
instance-attribute
¶
rfdc_cfg = MyRFdcConfig()
instance-attribute
¶
dac_tiles = [(MyRFdcDACTile(tile_id, tile)) for tile_id, tile in (enumerate(self.rfdc.dac_tiles))]
instance-attribute
¶
adc_tiles = [(MyRFdcADCTile(tile_id, tile)) for tile_id, tile in (enumerate(self.rfdc.adc_tiles))]
instance-attribute
¶
clock_src = self.rfdc_cfg.freq_cfg.clock_src
instance-attribute
¶
debug_mode = debug_mode
instance-attribute
¶
Functions¶
debug()
¶
Source code in rfsoc_rfdc/rfdc.py
init()
¶
setup()
¶
Configure DAC/ADC blocks
Source code in rfsoc_rfdc/rfdc.py
is_ready()
¶
Check if all tiles are powered up
shutdown_tiles()
¶
Safely shutdown all tiles.
Source code in rfsoc_rfdc/rfdc.py
is_dac_tile_ready(tile)
¶
power_on_dac_tile(tile)
¶
Power on DAC tiles.
Source code in rfsoc_rfdc/rfdc.py
is_adc_tile_ready(tile)
¶
power_on_adc_tile(tile)
¶
Power on ADC tiles.
Source code in rfsoc_rfdc/rfdc.py
config_dac_nco(tile, block_id, nco_freq_mhz)
¶
Configure the NCO freq of a DAC block
Source code in rfsoc_rfdc/rfdc.py
config_dac_block(tile, block_id)
¶
Configure a single DAC block within a tile.
Source code in rfsoc_rfdc/rfdc.py
config_dac_blocks(tile)
¶
config_adc_nco(tile, block_id, nco_freq_mhz)
¶
Configure the NCO freq of an ADC block
Source code in rfsoc_rfdc/rfdc.py
config_adc_block(tile, block_id)
¶
Configure a single ADC block within a tile.
Source code in rfsoc_rfdc/rfdc.py
MyRFdcType()
¶
Attributes¶
DATA_PATH_DTYPE = np.int16
class-attribute
instance-attribute
¶
DAC_MAX_SCALE = 2 ** 13
class-attribute
instance-attribute
¶
POWER_ON_STATES = ['[Device Power-up and Configuration]', '[Power Supply Adjustment]', '[Clock Configuration]', '[Converter Calibration (ADC only)]', '[Wait for deassertion of AXI4-Stream reset]', '[Done]']
class-attribute
instance-attribute
¶
POWER_ON_DESC = ['[The configuration parameters set in the Vivado® IDE are programmed into the converters. The state machine then waits for the external supplies to be powered up. In hardware this can take up to 25 ms. However this is reduced to 200 µs in behavioral simulations.]', '[The configuration settings are propagated to the analog sections of the converters. In addition the regulators, bias settings in the RF-DAC, and the common-mode output buffer in the RF-ADC are enabled.]', '[The state machine first detects the presence of a good clock into the converter. Then, if the PLL is enabled, it checks for PLL lock. The clocks are then released to the digital section of the converters.]', '[Calibration is carried out in the RF-ADC. In hardware this can take approximately 10 ms, however this is reduced to 60 µs in behavioral simulations.]', '[The AXI4-Stream reset for the tile should be asserted until the AXI4-Stream clocks are stable. For example, if the clock is provided by a MMCM, the reset should be held until it has achieved lock. The state machine waits in this state until the reset is deasserted.]', '[The state machine has completed the power-up sequence.]']
class-attribute
instance-attribute
¶
POWER_ON_SEQUENCE_STEPS = [{'Sequence Number': 0, 'State': POWER_ON_STATES[0], 'Description': POWER_ON_DESC[0]}, {'Sequence Number': 1, 'State': POWER_ON_STATES[0], 'Description': POWER_ON_DESC[0]}, {'Sequence Number': 2, 'State': POWER_ON_STATES[0], 'Description': POWER_ON_DESC[0]}, {'Sequence Number': 3, 'State': POWER_ON_STATES[1], 'Description': POWER_ON_DESC[1]}, {'Sequence Number': 4, 'State': POWER_ON_STATES[1], 'Description': POWER_ON_DESC[1]}, {'Sequence Number': 5, 'State': POWER_ON_STATES[1], 'Description': POWER_ON_DESC[1]}, {'Sequence Number': 6, 'State': POWER_ON_STATES[2], 'Description': POWER_ON_DESC[2]}, {'Sequence Number': 7, 'State': POWER_ON_STATES[2], 'Description': POWER_ON_DESC[2]}, {'Sequence Number': 8, 'State': POWER_ON_STATES[2], 'Description': POWER_ON_DESC[2]}, {'Sequence Number': 9, 'State': POWER_ON_STATES[2], 'Description': POWER_ON_DESC[2]}, {'Sequence Number': 10, 'State': POWER_ON_STATES[2], 'Description': POWER_ON_DESC[2]}, {'Sequence Number': 11, 'State': POWER_ON_STATES[3], 'Description': POWER_ON_DESC[3]}, {'Sequence Number': 12, 'State': POWER_ON_STATES[3], 'Description': POWER_ON_DESC[3]}, {'Sequence Number': 13, 'State': POWER_ON_STATES[3], 'Description': POWER_ON_DESC[3]}, {'Sequence Number': 14, 'State': POWER_ON_STATES[4], 'Description': POWER_ON_DESC[4]}, {'Sequence Number': 15, 'State': POWER_ON_STATES[5], 'Description': POWER_ON_DESC[5]}]
class-attribute
instance-attribute
¶
Functions¶
Functions¶
dB2Amp(atten_db)
¶
Convert dB to amplitude. Output shall be a positive number between 0.0 and 1.0